1. Field of the Invention
The present invention relates to a stabilized DC (Direct Current) power supply circuit (stabilized DC power supply unit) and, more specifically, a stabilized DC power supply circuit having the function of limiting an output current.
2. Description of Related Art
FIG. 5 shows a circuit diagram (equivalent circuit diagram) of a conventional example of a stabilized DC power supply circuit. A stabilized DC power supply circuit 101 (hereinafter, referred to as “power supply circuit 101” simply) of FIG. 5 includes an output transistor Q1, a driving transistor Q3, voltage division resistors R1 and R2 for dividing an output voltage Vo, an error amplifier 7, a reference voltage source 8, and an output current limiting circuit 102.
FIG. 6 shows a circuit diagram of the power supply circuit 101 that has embodied an internal circuit of the output current limiting circuit 102. The output current limiting circuit 102 shown in FIG. 6 includes a differential amplifier 4, a constant current source 5, and resistors R103 and R104. In FIG. 6, the differential amplifier 4 compares a potential VA represented by a product of a base current IB1 of the output transistor Q1 and a resistance value of the resister R103 with a potential VB represented by a product of a constant current I1 output from the constant current source 5 and a resistance value of the resistor R104.
If the base current IB1 of the output transistor Q1 increases with an increasing output current Io of the power supply circuit 101 until VA exceeds VB, the differential amplifier 4 starts to draw out a current from the error amplifier 7, thereby finally reducing to zero a current to be supplied from the error amplifier 7 to a base of the driving transistor Q3. In such a manner, the output current limiting circuit 102 (differential amplifier 4) limits the base current IB1 of the output transistor Q1, thereby restricting the output current Io.
FIG. 7 shows a circuit diagram of a power supply 201 that employs an output current limiting circuit 102a different from the output current limiting circuit 102. In FIG. 7, the same components as those of FIGS. 5 and 6 are indicated by the same reference numerals. The base current IB1 of the output transistor Q1 flows through a transistor Q4 whose collector and base are short-circuited and the resistor R103 to a ground. The output current limiting circuit 102a in the power supply circuit 201 includes a transistor Q5 and the resistors R103 and R104.
In the power supply circuit 201, the transistors Q4 and Q5 form a current mirror circuit, so that a collector current of the transistor Q5 increases in proportion to a collector current of the transistor Q4. That is, if the base current IB1 of the output transistor Q1 increases with the increasing output current Io, the transistor Q5 starts to draw out a current from the error amplifier 7, thereby finally eliminating a current to be supplied from the error amplifier 7 to a base of the driving transistor Q3. In such a manner, the output current limiting circuit 102a in the power supply circuit 201 functions to limit the base current IB1 of the output transistor Q1, thereby restricting the output current Io.
The following will consider the power supply circuit 101 of FIG. 6. A threshold value of such a magnitude of the output current Io that a relationship of VA=VB may be established, that is, a threshold current value at which the output current limiting circuit 102 starts to limit an increase in output current Io is referred to as an output peak current (limit current; limit value) IOP.
A magnitude of the base current IB1 of the output transistor Q1 in a condition where the output current Io is limited largely depends on a current amplification factor hFE1 of the output transistor Q1. The current amplification factor hFE1 of the output transistor Q1, in turn, varies with variation of the manufacturing process and, also, varies with the early effect that corresponds to variation in input voltage Vi and changes in ambient temperature. Further, resistance values of the resistors R103 and R104 also vary with variation of the manufacturing process as well as changes in ambient temperature.
Since the output peak current IOP represents a magnitude of the output current Io at which the relationship of VA=VB is established, it is influenced by variation in current amplification factor hFE1 and resistance values of the resistors R103 and R104. That is, the value of the output peak current IOP also varies largely with variation of the manufacturing process and changes in input voltage Vi and ambient temperature.
For example, if the current amplification factor hFE1 decreases due to variation of the manufacturing process etc., the output peak current IOP decreases. Further, if the resistance value of the resistor R104 decreases to a level smaller than a design value (target value) or the resistance value of the resistor R103 increases in excess of the design value (target value) owing to variation of the manufacturing process, the relationship of VA=VB is established at a smaller value of the base current IB1, so that the output peak current IOP decreases.
In a case where a rated current of an output of the power supply circuit 101 (or a rated current of a power supply IC mounted with the power supply circuit 101) is 300 mA, desirably, the output peak current IOP (specification value of the output peak current IOP) is about 330 to 400 mA ordinarily. However, in the conventional example, the output peak current IOP largely depends on variation in current amplification factor hFE1 and the resistance values of the resistors R103 and R104 as described above, so that its specification value becomes about 330 to 600 mA or larger.
It is to be noted that the power supply circuit shown in FIGS. 6 or 7 or this circuit excluding the output transistor Q1 is often used as a stabilized DC power supply integrated circuit (IC) in an electronic apparatus for recording information to and reproducing it from a recording medium represented by a compact disk read only memory (CD-ROM), a digital versatile disk read only memory (DVD-ROM), a digital versatile disk random access memory (DVD-RAM), etc. These electronic apparatuses are greatly desired to be more compact and thinner and more inexpensive.
Generally, when a voltage is applied to a stabilized DC power supply IC, a maximum current (maximum capacity current) that this stabilized DC power supply IC can supply, that is, the output peak current IOP flows instantaneously. Therefore, it is necessary to set a current capacity of a device provided at a preceding stage of the stabilized DC power supply IC to such a value that this output peak current IOP can be supplied.
For example, in a case where a conventional stabilized DC power supply IC is employed and its rated output current is 300 mA as described above, a specification value of the output peak current IOP becomes, for example, 600 mA or larger, so that it is necessary to set the current capacity of the preceding-stage device to at least 600 mA. Such an increase in current capacity increases a size and costs of the electronic apparatus as a whole.
Taking into these problems, Japanese Patent Application Laid-Open No. 2000-270469 (hereinafter, referred to as Patent Literature 1) has proposed a circuit that reduces variation in output peak current of the output transistor caused by the early effect.
Further, Japanese Patent Application Laid-Open No. H03-136112 (1991) (hereinafter, referred to as Patent Literature 2) has proposed a circuit for reducing variation in output peak current by inserting a current detecting resistor between an input terminal and an output transistor to limit an output current based on a voltage generated across this current detecting resistor.
As described above, an increase in variation of the output peak current IOP leads to an increase in current capacity of the device provided at the preceding stage. This current capacity of the preceding-stage device needs to be reduced as much as possible in order to decrease the costs and the size of the electronic apparatus as a whole. That is, it is important to reduce variation in output peak current IOP.
The circuit disclosed in Patent Literature 1 does not take into account variation in current amplification factor of the output transistor that are caused by variation of the manufacturing process and temperature and, therefore, has an insufficient effect to suppress variation in output peak current.
In the circuit disclosed in Patent Literature 2, on the other hand, variation in resistance value of the current detecting resistor or changes in temperature of this resistance value have an influence on the output peak current, so that this disclosed circuit does not in all cases have a sufficient effect to suppress variation in output peak current. Further, a resistance value of the current detecting resistor needs to be low sufficiently, so that this current detecting resistor occupies a greatly large area. Therefore, a technology of Patent Literature 2 cannot be optimal for the stabilized DC power supply IC.
Although the problems have been described which arise in use of a bipolar transistor, the same problems occur also when a field effect transistor is used.